IBM Quantum views the path to useful quantum computing not as a direct leap from current devices to a fully fault-tolerant computer, but as a spectrum of techniques for error mitigation, detection, and correction. According to material published by Ali Javadi-Abhari, Blake Johnson, Alireza Seif, and Jennifer Janechek on September 15, 2026, the practical measure of progress is not the number of logical qubits alone, but the size and complexity of circuits that can be run reliably using available resources.
The idea is based on a fundamental trade-off between time and the number of samples on one hand, and the number of qubits and gates on the other. Quantum error correction encodes information in logical qubits and addresses errors during or after circuit execution, but it requires a large number of qubits and gates, in addition to hardware with lower error rates, long-range connectivity, and real-time decoding. Error mitigation, by contrast, relies on running the circuit repeatedly to reduce the impact of noise, which increases sampling costs and can benefit from high-performance computing to reduce that cost.
What Do Hybrid Methods Add?
In the middle ground between the two approaches, hybrid techniques use elements of error correction and mitigation together. IBM states that recent error-correction techniques have demonstrated effective error rates approximately ten times lower than those of the underlying physical hardware, while hybrid methods have demonstrated a 63-fold reduction in inferred sampling overhead compared with using error mitigation alone.
One example is post-selection error correction using spacetime codes, which distribute low-weight Pauli checks across space and time. The hardware run is discarded if it does not satisfy the required checks. In an experiment cited in the material, 64 logical qubits were encoded using 76 physical qubits, with 314 T gates, and a circuit containing 2,336 CZ gates was run. After syndrome post-selection, the effective gate error rate improved by approximately tenfold, with a minimum fidelity of 0.349 at 95% confidence.
Post-selection does not eliminate all errors, however, because some noise can evade the symmetry checks. IBM therefore points to a research result that combined this method with probabilistic error cancellation (PEC), making it possible to obtain comparable expectation values using far fewer shots than PEC alone requires. This result does not establish full fault tolerance, but it illustrates how error detection can be combined with mitigation to extract better performance from current devices.
Software Control Is Part of the Error-Correction Stack
The approach is not limited to code design. IBM says that the IBM Quantum platform and Qiskit provide access to multiple layers of the stack, from control pulses and custom calibrations to dynamic circuits that combine measurements during execution with classical processing and immediate feedback.
The session-oriented execution model, which was launched as an experimental service the previous year, also enables client-side control of error mitigation, along with tools for profiling and noise learning. With packages such as qiskit-noise-learning, qiskit-mitigation, and Samplomatic, researchers can build custom protocols for noise learning and implement standardized mitigation strategies. The Executor tool additionally enables the retrieval of state information and IQ points, rather than limiting access to binary measurement results, which may be useful for decoding, state verification, and leakage analysis.
Two Paths to Reducing the Cost of Full Fault Tolerance
The material also discusses conditional quantum error correction, in which Clifford gates can be protected through error correction while errors in encoded T gates are mitigated using methods such as quantum probabilities. Because mitigation is applied only to gates outside the Clifford group, its overhead may become more manageable in devices that have begun operating at the logical level.
Another path proposes using weak transversal rotations that are resolved conditionally based on measurements of the code syndromes. Branches with incorrect syndromes can be discarded or repeated, rather than relying entirely on magic-state production, distillation, and teleportation routing. IBM says this idea could reduce execution time by tens to hundreds of times compared with the conventional Clifford + T approach, but this remains an expected research result rather than demonstrated performance on a production fault-tolerant system.
What Changes in Practice?
Hierarchical codes offer another path. They place algebraic codes, such as quantum Reed-Solomon codes, above inner qLDPC codes, so that the logical operations of the inner code provide the long-range connectivity required by the outer code without adding the same complexity to the hardware. IBM states that stacking Reed-Solomon codes above a high-rate inner code could theoretically reach a range of 1012 logical operations at a physical error rate of 10-3, using a less engineering-intensive unit.
However, real-time hierarchical error correction is not directly available in current-generation systems. Taking advantage of it also requires close integration between quantum processing units and CPU and GPU processors or specialized accelerators, which IBM connects to the IBM Quantum Systems API and a quantum-centric supercomputing architecture.
certi.news analysis: The core value of IBM’s proposal is that it shifts the discussion from “When will the fault-tolerant computer appear?” to a more measurable question: What size of circuit can be executed reliably at each point along the way? The figures cited indicate meaningful progress in reducing the cost of noise, but they do not mean that current devices have achieved full fault tolerance or that large-scale practical applications are now available. The results depend on noise models, sample post-selection, and classical resources, while scalability, connectivity, and the time required for decoding remain open questions. The gradual path therefore appears promising for researchers, but it does not eliminate the engineering gap between an improved logical-circuit experiment and building a large-scale fault-tolerant quantum computer.