2026-09-28
Global Production capacity for substrates is no longer sufficient to meet advanced packaging needs; package size, layer count, interconnect precision, and integrated functions make each design increasingly similar to a specialized manufacturing process. This affects materials, equipment, qualification, and supply sources, particularly in artificial intelligence, high-performance computing, integrated optics, and automotive packages.
Semiconductor Engineering presents a five-level framework for evaluating the autonomy of AI agents in chip design, starting with the optimization of a specific task and extending to the execution of a complete workflow within a controlled engineering scope. It emphasizes that the level of autonomy alone is insufficient unless the scope of decisions, verification mechanisms, and the engineer’s responsibility for intervention and final approval are specified.
2026-09-24 Global The shift of AI chips toward stacked architectures and chiplet-based designs is forcing EDA tools to analyze the entire system, from the chip to the package and board, while integrating agentic AI to accelerate exploration. However, interoperability, dynamic planning, power and thermal analysis, and maintaining result accuracy remain key challenges.