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Semiconductor Engineering presents a five-level framework for evaluating the autonomy of AI agents in chip design, starting with the optimization of a specific task and extending to the execution of a complete workflow within a controlled engineering scope. It emphasizes that the level of autonomy alone is insufficient unless the scope of decisions, verification mechanisms, and the engineer’s responsibility for intervention and final approval are specified.
An analytical article concludes that artificial intelligence will deliver the greatest value in chip design tools when it coordinates workflows across tools and teams, rather than merely optimizing a single tool. However, reliance on it remains conditional on continuity of meaning, deterministic verification, and the ability to audit every result.
Expert opinions from EDA and semiconductor companies explain that integrating hardware and software development faces organizational and technical obstacles, from differences between teams and tools to the difficulty of simulating complete workloads. AI may help write RTL and software, but it still lacks sufficient context to make complex architectural decisions.