The semiconductor industry witnessed a wide range of developments during the week ending August 14, 2026, reflecting growing demand for artificial intelligence infrastructure, from expanding advanced-packaging facilities to redesigning data centers and adopting new optical links and power architectures. This coincided with research into two-dimensional transistors, programmable memory, hardware security, and autonomous-vehicle chips.
Investments in Packaging and Research and Development
ASE subsidiary SPIL broke ground on an advanced-packaging and testing facility in Daliao, Taiwan, with an investment of approximately $3.1 billion. The facility will be built on six hectares and is expected to add capacity for CoWoS packaging used in artificial-intelligence chips, with first-phase production targeted to begin in 2028. The facility also plans to provide more than 2,200 jobs upon completion.
Lam Research, for its part, said it would spend $3 billion over five years to expand its research-and-development laboratory network, increasing its ability to conduct experiments by more than 50%. The company also announced a partnership with NY Creates to train approximately 3,500 university students in semiconductor-manufacturing process integration over the next five years, using the SEMulator3D virtual manufacturing-simulation program.
In a broader context, Rhodium Group expected China’s capacity to produce mature-node chips to approach half of global production by 2030, with local equipment companies continuing to expand despite restrictions on China’s access to the latest artificial-intelligence chips.
Data Centers Turn Toward Photonics and Higher Power
The report said that data-center network architecture is undergoing a transformation as optical links take on a growing role in connecting artificial-intelligence clusters. The move toward one-megawatt racks is also driving fundamental changes in cooling, power distribution, rack design, and three-dimensional integrated-circuit packaging.
Within the Open Compute Project, coalitions comprising 19 companies developed a plan for standardized silicon-photonics-ready infrastructure for artificial-intelligence systems. The project is also collaborating with Google, Microsoft, and Nvidia to establish 800-volt direct current as an open, standardized power architecture for artificial-intelligence data centers, accelerating the transition to low-voltage direct-current distribution.
Co-packaged optics, or CPO, is expanding as data centers seek to increase performance and reduce power consumption, but the report noted that keeping pace with demand is a challenge as the technology moves from laboratory tools to automated production-test equipment inside factories. By contrast, experts from the University of California, Berkeley, said that advancing artificial intelligence does not always require larger data centers; smaller, open-source models have become capable of performing many tasks with lower computing, energy, and water consumption and may run on local hardware.
Memory Deals and Financing
Sony Semiconductor and TSMC announced an agreement concerning their joint project for next-generation image sensors in Japan. Sony will contribute approximately ¥465 billion, or about $2.9 billion, and will control the project, while TSMC will contribute approximately ¥282 billion, or about $1.8 billion. The Kumamoto plant is expected to begin mass production of smartphone image sensors in 2029, with the required regulatory approvals still pending.
Counterpoint reported that enterprise SSDs accounted for 48% of globally shipped NAND bits during the second quarter, compared with 26% a year earlier, while YMTC ranked third in NAND shipments with a 14% share. Kearney said that memory manufacturers are reducing NAND investment and focusing instead on higher-return HBM and DRAM, extending the period of tight NAND supply.
Kioxia and Sandisk announced 2-terabit three-dimensional QLC flash memory based on a CMOS directly Bonded to Array, or CBA, architecture, improving performance without requiring changes to the NAND-cell layers. Intel also raised $20 billion through an expanded primary share offering, and its chief executive, Lip-Bu Tan, said the capital would support growth opportunities in advanced-node chip manufacturing, advanced packaging, and demand for CPU units.
New Research on Transistors and Quantum Computing
KAIST developed what it described as a programmable dynamic memory transistor that uses a dual-function gate structure to control dynamic behavior at the hardware level without continuous biasing or input preprocessing. The researchers said the design reduced prediction errors by up to 40 times compared with conventional devices.
A team from NYCU, TSMC, and other institutions also developed an ultrathin interface made of epitaxial aluminum oxide for monolayer MoS₂ transistors. The interface is intended to improve gate control while avoiding mobility losses that have limited the use of two-dimensional devices in the transistor-scaling roadmap.
In quantum computing, researchers from QuTech and TU Delft demonstrated a flip-chip architecture integrating superconducting qubits using electroplated indium bump bonds and achieved quality factors approaching 10⁶. Quantinuum also entered into a partnership with Oracle to enable Oracle customers to integrate graphics-processing and high-performance-computing services with Quantinuum’s 98-qubit Helios quantum computer in an Oracle cloud facility.
Hardware Security and Autonomous Vehicles
USENIX Security week included research on side-channel attacks against RISC-V processors, AMD SEV-SNP integrity bypasses, cache-partitioning exploitation in NVIDIA MIG, and ransomware attacks against cloud FPGA units. Taiwanese officials also said that an artificial-intelligence-backed attack breached at least 85 government accounts and stole more than 2,500 employee records, according to reports by the Financial Times and Dream Group.
In the automotive sector, TIER IV will develop an open-source artificial-intelligence accelerator for Level 4 autonomous driving under a program supported by JST in Japan. This includes the chip architecture, compiler, and toolchain, with the aim of supporting safer, lower-power edge artificial intelligence. LX Semicon began mass production of the LX61101 chip, an automotive MCU intended for Hyundai and Kia vehicles, making it the first MCU produced in South Korea for either company.