Chips and Semiconductors

Processors, GPU units, on-device artificial intelligence, chip manufacturing, and industry news.

66 Articles

Chips and Semiconductors

Chip Industry Week: Design Agents, HBM Memory, Photonics, and Energy and Security Pressures

Semiconductor Engineering reviewed several major developments in the chip industry, from artificial intelligence agents for chip design and Spectre-v2 threats to the expansion of advanced packaging and photonics and the shortage of engineers. The overall picture reveals that the growth of AI infrastructure is simultaneously placing pressure on memory, energy, networking, and manufacturing capacity.

2026-10-02

Chips and Semiconductors

Why Chip Verification Needs a Connected Digital Thread, Not More Tools

The article argues that the complexity of modern systems has made simply compiling tests and reports insufficient, and that chip design teams need a verification thread linking requirements to configurations, tests, and results throughout the lifecycle. It explains that the value of this approach depends on the clarity of requirements and the recording of evidence and its context, not on tool integration alone.

2026-09-29

Chips and Semiconductors

Moores Lab AI Bets on Agentic AI to Accelerate Chip Design

Moores Lab AI is developing tools to automate stages of chip design and verification, saying its customers have been able to reach their first bug within 48 hours instead of waiting months. But the company acknowledges that AI reliability remains a critical challenge in an industry that does not tolerate mistakes.

2026-09-29

Chips and Semiconductors

Why Advanced Packaging Substrates Are Moving Toward Application-Specific Designs

Production capacity for substrates is no longer sufficient to meet advanced packaging needs; package size, layer count, interconnect precision, and integrated functions make each design increasingly similar to a specialized manufacturing process. This affects materials, equipment, qualification, and supply sources, particularly in artificial intelligence, high-performance computing, integrated optics, and automotive packages.

2026-09-28

Chips and Semiconductors

From L1 to L5: How Is the Autonomy of AI Agents in Chip Design Measured?

Semiconductor Engineering presents a five-level framework for evaluating the autonomy of AI agents in chip design, starting with the optimization of a specific task and extending to the execution of a complete workflow within a controlled engineering scope. It emphasizes that the level of autonomy alone is insufficient unless the scope of decisions, verification mechanisms, and the engineer’s responsibility for intervention and final approval are specified.

2026-09-24

Chips and Semiconductors

3D Chips Push Chip Design Tools to Rebuild the Workflow

The shift of AI chips toward stacked architectures and chiplet-based designs is forcing EDA tools to analyze the entire system, from the chip to the package and board, while integrating agentic AI to accelerate exploration. However, interoperability, dynamic planning, power and thermal analysis, and maintaining result accuracy remain key challenges.

2026-09-24

Chips and Semiconductors

The Future of Chip Design Tools Is Moving Toward Evidence-Backed Automation

An analytical article concludes that artificial intelligence will deliver the greatest value in chip design tools when it coordinates workflows across tools and teams, rather than merely optimizing a single tool. However, reliance on it remains conditional on continuity of meaning, deterministic verification, and the ability to audit every result.

2026-09-24

Chips and Semiconductors

Singaporean Nexstrom Raises $12 Million to Develop 2D Semiconductor Manufacturing

Nexstrom has raised a $12 million seed funding round to develop equipment that grows 2D semiconductor materials directly on 300 mm wafers. The company aims to help chip fabs produce TMD materials in commercial quantities, but does not expect its equipment to be ready for commercial production before the period between 2030 and 2035.

2026-09-22

Chips and Semiconductors

日本ガイシ Presents Ceramic Solutions for Dissipating Heat from AI Chips and Improving CPO Signals

日本ガイシ presented ceramic technologies targeting cooling and signal-loss challenges in semiconductor packages used with AI workloads, including an aluminum nitride substrate for 300 mm sizes and a packaging architecture for co-packaged optics (CPO) applications.

2026-09-18

Chips and Semiconductors

Chip Week: Memory and AI Redraw the Manufacturing Map

Semiconductor Engineering’s weekly review reveals the synchronization of several shifts in the chip industry: memory deals, the expansion of artificial intelligence infrastructure, the rising cost of designing advanced nodes, and the emergence of Chinese equipment suppliers. The developments also show that manufacturing, packaging, power, and security gaps continue to determine markets’ ability to capitalize on growing AI demand.

2026-09-18

Chips and Semiconductors

Huawei Reveals Ascend Chip Roadmap and Atlas Architecture to Expand AI Capabilities

Huawei announced new Ascend chips and Atlas SuperPoD systems designed to train and run artificial intelligence models, with launch dates spanning 2027 to 2029. The plan includes an optical interconnect architecture, while the company says its new architecture could deliver performance equivalent to 1.4-nanometer chips by 2031 without relying on comparable process-node shrinkage.

2026-09-17

Chips and Semiconductors

Vodafone Egypt Begins Commercial Use of Ericsson RAN Processor 6672 at Network Sites

Vodafone Egypt has begun commercial use of the Ericsson RAN Processor 6672, designed to run artificial intelligence workloads and support 5G networks directly at network sites. Ericsson says the processor increases processing capacity fourfold and reduces energy consumption by more than 50% compared with the previous generation.

2026-09-17

Chips and Semiconductors

The Storage Problem in the Age of AI Is Becoming a Chip Packaging Challenge

Semiconductor Engineering’s analysis finds that the expansion of AI workloads depends not only on computing capabilities, but also requires higher-density storage and packaging technologies capable of accommodating thinner NAND dies and taller structures. The article highlights hybrid bonding, die stacking, and the role of outsourced semiconductor assembly and test companies as decisive factors in turning density-increase promises into manufacturable products.

2026-09-17

Chips and Semiconductors

Why Have Materials Innovations Become a Critical Factor in Surpassing Chip Scaling Limits?

An analysis published in Semiconductor Engineering argues that the future of semiconductor manufacturing will depend not only on shrinking components, but also on developing new materials through simulation, artificial intelligence, and early collaboration among chip manufacturers, equipment suppliers, and materials suppliers. The analysis presents examples including dry manufacturing processes, photonic interconnects, and gallium nitride substrates.

2026-09-17

Chips and Semiconductors

Negative Thermal Expansion Materials Offer a Path to Reducing Chip Package Warpage

The semiconductor packaging industry is exploring negative thermal expansion materials that can reduce mismatches between the expansion of the die, substrate, and surrounding mold compound, a problem that is worsening as package and panel sizes increase. However, widespread adoption of these materials still depends on their ability to operate across a broad temperature range, mix homogeneously, and control impurities.

2026-09-17

Chips and Semiconductors

Why Is It Difficult to Build a Reliable Digital Twin for Advanced Chip Packaging?

It is not enough for a digital twin to emulate the theoretical design of a package; it must remain synchronized with what production lines actually manufacture, while linking chip, material, supplier, and test data. The article reveals that insufficient context, overlapping physical effects, and the need for continuous calibration are the main obstacles to building a digital twin for advanced chip packages.

2026-09-17

Chips and Semiconductors

Can the U.S. Midwest Build an Integrated Semiconductor Ecosystem?

Investments by Intel and SK hynix, along with quantum projects in Chicago, are driving the transformation of the U.S. Midwest into a new semiconductor hub. However, the skills shortage and the sustainability of funding will determine whether this transformation becomes a genuine industrial ecosystem or a temporary investment wave.

2026-09-17

Chips and Semiconductors

Why Is the Bus No Longer Enough to Connect Systems on Chip?

A technical paper from SignatureIP explains that growing unit counts and workload diversity, particularly in artificial intelligence, automotive, and chiplet-based designs, are driving SoC designs beyond traditional buses and crossbars toward NoC networks and directory-based coherency.

2026-09-16