Chips and Semiconductors

Processors, GPU units, on-device artificial intelligence, chip manufacturing, and industry news.

74 Articles

Chips and Semiconductors

Arm Unveils Three Products to Advance On-Device AI, Infrastructure, and Robotics

Arm announced Arm CSS for Mobile 2, Arm Neoverse CSS N4, and Arm Total Design for Physical AI, with enhancements targeting AI processing on phones, infrastructure for building intelligent agents, and accelerated robotics development.

2026-09-09

Chips and Semiconductors

Three Studies Target Bottlenecks in Chip Interconnects, SiC Circuits, and In-Memory Computing

Recent research from universities in Singapore, Japan, and South Korea examines three chip technologies: an ultrathin carbon layer for insulating copper interconnects, SiC transistors operating at more than 600 degrees Celsius, and an insulating structure that improves the reliability of vertical-channel transistors used in in-memory computing.

2026-09-08

Chips and Semiconductors

Kioxia Showcases Flash and CXL Technologies to Ease Memory Pressure in AI Data Centers

During the FMS event, Kioxia showcased technologies based on low-latency flash and CXL-connected memory modules to expand memory capacity in AI data centers, where DRAM has become costly and supply-constrained. The company also presented new generations of XL-FLASH and BiCS FLASH with improvements in capacity and energy efficiency.

2026-09-04

Chips and Semiconductors

Four Transformations Shaping the Chip Design Landscape: From Artificial Intelligence to 6G Networks

Semiconductor Engineering reviews a group of trends affecting chip design and advanced architectures, including the evolution of architectures, the use of artificial intelligence in 3D-IC design, the growth of India’s semiconductor sector, and the trajectory of 6G technologies.

2026-09-02

Chips and Semiconductors

Three Studies Push GaN Toward Higher Voltage, Lower Resistance, and Better Cooling

Recent research presents three pathways for improving gallium nitride-based power electronics and communications: a transistor that withstands nearly 4 kilovolts, a low-resistance p-GaN junction, and the integration of GaN transistors into a diamond layer for heat dissipation.

2026-09-01

Chips and Semiconductors

imec Develops Key Manufacturing Modules to Advance CFET Transistors Beyond the A7 Node

imec presented two modules to improve the manufacturability of CFET transistors: a backside-contact structure that increased drive current and reduced access resistance to the bottom devices, and a dipole-middle gate structure for tuning threshold voltage within a suitable thermal budget. The results represent research progress, but do not yet demonstrate CFET readiness for large-scale commercial production.

2026-09-01

Chips and Semiconductors

NVIDIA’s $3.5 Billion Investment in MediaTek Expands Its Influence Beyond the GPU Market

NVIDIA is investing $3.5 billion in MediaTek as part of a partnership that enables the Taiwanese company to design custom AI chips for cloud customers and AI labs, integrating them into data centers based on NVIDIA technologies. The deal reveals NVIDIA’s attempt to maintain its central position as major technology companies move toward developing their own chips.

2026-08-31

Chips and Semiconductors

Photonics Redefine the Design of Interconnected Chip Systems

Integrating photonic dies near processors promises to reduce energy consumption and increase bandwidth, but it turns chiplet design into a collaboration between the thermal, mechanical, electromagnetic, and optical domains. Therefore, selecting the location of the photonic die is no longer a separate decision, but part of the complete system design and verification process.

2026-08-31

Chips and Semiconductors

Research from Georgia Tech and Synopsys Proposes a 3D SRAM Cell for the 2nm Node

Researchers from Georgia Institute of Technology and Synopsys propose a six-transistor SRAM cell with a monolithic three-dimensional design at the 2nm node, using indium gallium oxide pass-gates in back-end-of-line layers. The research reports a 25% area reduction and a 42.2% reduction in write latency at the subarray level compared with a high-performance silicon baseline.

2026-08-30

Chips and Semiconductors

University of Alberta Researchers Develop a Model to Predict Post-Routing Chip Performance

The PPAPlace paper proposes a differentiable model that predicts performance, power, and area metrics after routing, based on the locations of large blocks and standard cells. On five test circuits, the model achieved average improvements of 22% in WNS and 51% in TNS compared with a hierarchical baseline, while preserving power and routability.

2026-08-29

Chips and Semiconductors

Georgia Tech Study Proposes Electrical Tuning to Reduce Optical-Link Stalls During MoE Model Training

A research paper from the Georgia Institute of Technology analyzes the impact of repeated thermal-tuning operations in wafer-scale optical interconnects used to train language models based on the Mixture of Experts architecture. According to the published abstract, eliminating stalls accelerated training of Mixtral 8x7B by 2.7 times in the scenario studied.

2026-08-28

Chips and Semiconductors

Mitsubishi Materials Develops Hafnium Purification Technology as Demand Linked to AI Data Centers Grows

Mitsubishi Materials announced the development of a technology to purify hafnium, a rare metal used in semiconductor and nuclear energy applications, with samples scheduled to become available during 2026 and commercial production targeted for 2028. The company did not disclose the purity level, technology cost, or expected production volume in the available material.

2026-08-28

Chips and Semiconductors

How Memory Coherency Reduces the Complexity of AI Chip Software

The article explains how memory coherency technology, by managing the state of shared data in hardware, can reduce the software burden in artificial intelligence systems that combine CPUs, accelerators, and multi-die chips. However, it emphasizes that coherency should not be applied to every data movement, but rather to the shared information needed to coordinate the operation of system components.

2026-08-27

Chips and Semiconductors

A Practical Method for Introducing AI into RF Circuit Design Without Rebuilding the Workflow

The article proposes a gradual path for adopting artificial intelligence in radio-frequency circuit design, beginning with documenting expertise, then coordinating tools and accelerating design exploration. It emphasizes that model speed is insufficient without verifying that simulation results correlate with measured hardware and tracking training data.

2026-08-27

Chips and Semiconductors

Why Does Agentic AI in Chip Design Need a Strong Human Architecture?

A discussion bringing together experts from Cadence, ChipAgents, Keysight EDA, Siemens EDA, and Synopsys explains that agentic AI has moved from automating individual tasks to running long, multi-agent flows, but it still relies on humans to define the design scope, verify results, and build guardrails that prevent critical errors.

2026-08-27

Chips and Semiconductors

From Specification to Formal Properties: AI Speeds Up Chip Design Verification but Does Not Eliminate the Engineer

Large language models are nearing the point of converting chip design specifications into formal properties in SystemVerilog Assertions, potentially reducing the time needed to prepare verification drafts. However, incomplete specifications, the possibility of producing syntactically correct but logically weak properties, and the high review burden make human oversight essential, while the actual economic return remains uncertain.

2026-08-27

Chips and Semiconductors

HBM Expansion Runs Up Against Stacking, Thermal, and DRAM Manufacturing Capacity Limits

An analysis presented during Hot Chips 2026 reveals that increasing HBM memory layers is no longer merely a matter of density and capacity, but has become a manufacturing-, packaging-, cooling-, and yield-level problem. Rising AI demand for HBM is also putting pressure on traditional DRAM supplies, at a time when new fabs require years before production begins.

2026-08-27

Chips and Semiconductors

NVIDIA Begins Shipping Vera Processor Designed for Agentic AI Workloads

NVIDIA has begun shipping Vera processor systems to AWS, Oracle Cloud Infrastructure, and the laboratories of Anthropic, OpenAI, and SpaceXAI, with a design targeting orchestration, tool calling, and context retrieval tasks that accompany agentic AI models. The company says the processor includes 88 custom Olympus cores and delivers memory bandwidth of 1.2 terabytes per second, but pricing details and broad commercial availability were not disclosed.

2026-08-27